By James Morra, Senior Editor
Published by Electronic Design
Main Facts
As artificial intelligence workloads scale to unprecedented levels, the power demands of modern AI accelerators are creating severe stress on board-level power delivery networks (PDNs). To combat this growing threat, Texas Instruments (TI) has introduced the ADC34DSO75, a specialized 14-bit analog-to-digital converter engineered specifically to monitor the low-voltage, high-current power rails feeding high-performance AI processors.
Unveiled at the OCP Global Summit, the quad-channel device samples at up to 3 gigasamples per second (GSPS) with a 3GHz full-power input bandwidth. By combining high-speed analog sampling with advanced on-chip digital signal processing (DSP) and event-based telemetry, the ADC34DSO75 captures nanosecond-scale power transients—such as voltage overshoots and droops—thousands of times faster than traditional monitoring solutions. This enables hyper-scale data centers to continuously track electrical stability at the GPU and CPU core level without relying on bulky, expensive, and power-hungry Field-Programmable Gate Arrays (FPGAs).

Chronology: The Escalating Crisis of AI Power Dynamics
The Shift to Extreme Power Densities
The engineering challenge addressed by TI’s new ADC has evolved rapidly over recent hardware generations. Historically, data center workloads scaled predictably, allowing power delivery networks to manage thermal and electrical loads using standard millisecond-interval telemetry systems. However, the advent of massive generative AI models fundamentally altered this paradigm.
- The Generation of Rapid Load Transients: Modern AI accelerators—such as NVIDIA’s Blackwell architecture and AMD’s Instinct GPUs—can shift from near idle to full utilization almost instantaneously. When executing intensive training loops or massive inference queries, these processors experience load transients ($di/dt$) featuring slew rates exceeding 2,000 A/µs at the chip level and 2.5 A/µs at the power supply unit (PSU).
- The Outstripping of Traditional Power Electronics: These lightning-fast current spikes easily outpace the response times of upstream rack-level power supplies and local board-level voltage regulators. Even with substantial decoupling capacitors clustered around the processor, power rails suffer from severe voltage undershoots and overshoots.
- The Rise of the "Brownout": While catastrophic blackouts instantly shut down entire server clusters, micro-glitches operate like insidious brownouts. Unfolding over nanoseconds, these voltage disruptions put portions of an AI model out of commission, trigger processor throttling, cause unexpected reboots, and extend multi-week model training runs at an immense financial cost.
- Introduction of the ADC34DSO75: Recognizing that legacy telemetry creates a blind spot where everything appears normal while micro-faults accumulate, Texas Instruments developed the ADC34DSO75 to bring high-speed oscilloscope-grade visibility directly onto the server motherboard.
Supporting Data and Technical Specifications
To effectively police low-voltage, high-current cores ($V_CORE$ lines running between 0.8 V and 1.2 V), monitoring hardware must overcome stringent signal-integrity hurdles. A fluctuation of just tens of millivolts on these rails can destabilize an advanced accelerator.
The ADC34DSO75 is built to meet these demanding parameters through several core engineering specifications:

- Sampling Rate and Bandwidth: Operates at up to 3 GSPS with buffered analog inputs supporting a 3 GHz full-power input bandwidth, capturing ultra-fast transient faults.
- Resolution and Signal Fidelity: Features a 14-bit architecture with a 68-dB signal-to-noise ratio (SNR) and exceptionally low phase and amplitude noise, allowing it to resolve minute variations on low-voltage rails.
- Power Efficiency: Consumes only 1.6 Watts per channel at full sampling speed, ensuring it does not overtax the host server’s power budget.
- Event-Based Telemetry Architecture: Rather than dumping a continuous, unmanageable stream of raw data that would overwhelm the system, each channel features an independent event-detection engine. Engineers can program custom thresholds for voltage limits and rates of change.
- Integrated Memory and Black-Box Recording: Includes 256 kB of on-chip memory divisible across its four channels. This memory stores pre-trigger and post-trigger data, providing deep contextual insight into the exact sequence of electrical events leading up to a fault.
- Scalability and System-on-Module (SOM) Support: Multiple ADC devices can be daisy-chained via an octal SPI interface. TI also introduced a dual-ADC system-on-module capable of monitoring up to eight voltage rails simultaneously, complete with external flash memory to preserve data integrity during total power blackouts.
Official Responses and Industry Perspectives
Texas Instruments leadership emphasizes that the sheer scale of modern AI infrastructure makes even minor power fluctuations unacceptable.
"When there’s a blackout, that’s a very dramatic event that can bring the entire AI data center down," said Karthik Vasanth, Vice President and General Manager of Data Converters at Texas Instruments. "There is a more subtle problem, which is a brownout, where you have a small voltage glitch on one of these racks, and that puts the model or a portion of the model out of commission or causes the rack to not function properly. And these AI models are not just residing in one of these racks; they’re probably residing in the entire data center. So it’s no longer acceptable [to be] down even for a small amount of time because of the repercussions."
Vasanth underscored the difficulty of identifying these events using traditional methods, comparing the task to "looking for a little needle buried somewhere in a massive haystack, which is the data center."

Detailing the deployment benefits, Matthew Hann, Product Line Manager for High-Speed Data Converters at TI, explained how the device bridges the gap between massive lab test equipment and remote data center management:
"In a sense, it brings more intelligence to the edge, and the edge is the GPU power rails and CPU power rails… You can program what you’re looking for, and when that event actually happens, you store the information in memory. You can download it and process it when you want to or as fast as you want to. It’s like having an oscilloscope for each node without the bulkiness of an oscilloscope."
Implications for the Future of Data Centers
The introduction of nanosecond-level, event-based power telemetry marks a fundamental shift in how hyperscalers approach hardware reliability, maintenance, and system design.

1. Eliminating Diagnostic Bottlenecks
Historically, isolating intermittent power faults required engineers to spend hours or days scanning system logs, firmware, and hardware configurations. In worst-case scenarios, technicians had to physically open servers, attach benchtop oscilloscopes to power rails, and wait days for a transient glitch to reoccur—causing prolonged and costly downtime. By shifting this capability onto a chip-scale module embedded directly within the hardware, diagnostic data is captured instantly and can be analyzed remotely.
2. Paving the Way for Predictive Maintenance
As AI clusters expand, thousands of GPUs ramp up and down in unison to execute massive distributed workloads. The financial toll of a single outage can reach hundreds of thousands of dollars per hour, forcing hyperscalers to demand automotive-grade reliability or higher from enterprise infrastructure.
By accumulating historical datasets on nanosecond-level transients, data center operators can begin leveraging machine learning models to spot recurring electrical anomalies before they manifest as brownouts, component degradation, or catastrophic system crashes. This transition from reactive troubleshooting to predictive fault mitigation will likely become a cornerstone of next-generation data center architecture as rack densities scale toward the 600-kilowatt thresholds expected with upcoming processor generations.
